HDMI 2.1 eARC Tx PHY in TSMC (16nm, 12nm)
The complete power- and area-optimized HDMI 2.1 TX IP solution encompasses a suite of configurable digital controllers, high-speed, mixed-signal PHY IP, verification IP, High-Bandwidth Digital Camera Protection (HDCP) IP, IP Prototyping Kits, Linux software drivers, and subsystem. Having all necessary design blocks for the HDMI subsystem, the IP solution enables system-on-chip (SoC) designers to lower integration risk and accelerate time-to-market.
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