High Density Single Port Reg File Compiler - Silterra 130 nm CL130G
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Embedded Memory IP IP
- The SST SuperFlash® IP is an embedded CMOS Flash memory IP with sector/chip Erase and byte Program capability.
- UFS IP for high-performance, low-power interface targeting embedded or removable non-volatile mass storage memory devices
- UMC 0.11um Embedded High Voltage Mask Reduction AL Process standard synchronous high density single port SRAM memory compiler.
- UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler.
- UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler with redundancy.
- Embedded synchronous single port SRAM/ROM memory controller with AXI slave port.