English
You are here:
High Density Single Port SRAM Compiler - TSMC 180 nm CL018LP
ARM offers an array of silicon proven SRAM, Register File and ROM memory compilers for all types of SoC designs ranging from performance critical to cost sensitive and low power applications. As part of the ARM Processor / Graphics Optimized packages, ARM Fast Cache Instances deliver tuned performance, power and area when building ARM Processors, Graphics and System IP.
Features
- Multiple architectures with flexibility to tradeoff density/performance
- Multiple Power management modes with power gating and multi-voltage operation
- Comprehensive redundancy scheme
- Flexible margining features
- Optional integrated pipeline
- Soft error repair
- Advanced test features
- Pseudo scan
Benefits
- Minimize die area and reduce die cost
- Flexible power management allows packaging cost reduction, competitive product with higher battery life
- Enables yield optimization
- Allow yield/performance tradeoff
- Allow high throughput
- Enables yield optimization
- Enhance product quality and minimize field returns
- Cuts down test time drastically by orders of magnitude reducing overall product test cost significantly
- Improved product quality lowers field failure
Deliverables
- Front End (FE) and Back End (FB) views with full suite of design views and models that support most of the industry's popular design tools can be downloaded from the ARM DesignStart web site at: http://www.arm.com/support/designstart.php
View High Density Single Port SRAM Compiler - TSMC 180 nm CL018LP full description to...
- see the entire High Density Single Port SRAM Compiler - TSMC 180 nm CL018LP datasheet
- get in contact with High Density Single Port SRAM Compiler - TSMC 180 nm CL018LP Supplier
Embedded Memory IP IP
- The SST SuperFlash® IP is an embedded CMOS Flash memory IP with sector/chip Erase and byte Program capability.
- UFS IP for high-performance, low-power interface targeting embedded or removable non-volatile mass storage memory devices
- UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler with redundancy.
- Fast Access Controller – a plug-and-play IP solution for fast embedded Flash Programming and Memory Testing
- Memory Controller for embeded systems supporting SDRAM and NandFlash, with bootstrap loader
- General purpose microprocessor incorporating a high performance L1 cache controller and virtual memory management support for high performance embedded system applications