High Density Single Port SRAM Compiler - UMC 28 nm L28HLPTGO
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Embedded Memory IP IP
- The SST SuperFlash® IP is an embedded CMOS Flash memory IP with sector/chip Erase and byte Program capability.
- UFS IP for high-performance, low-power interface targeting embedded or removable non-volatile mass storage memory devices
- UMC 0.11um Embedded High Voltage Mask Reduction AL Process standard synchronous high density single port SRAM memory compiler.
- UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler.
- Dual Port, Low Voltage, GF 55LPx with Embedded Flash, HVt & SVt, SRAM Memory Compiler
- General purpose microprocessor incorporating a high performance L1 cache controller and virtual memory management support for high performance embedded system applications