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High Density Two Port Reg File Compiler - TSMC 40 nm CLN40G
ARM offers an array of silicon proven SRAM, Register File and ROM memory compilers for all types of SoC designs ranging from performance critical to cost sensitive and low power applications. As part of the ARM Processor / Graphics Optimized packages, ARM Fast Cache Instances deliver tuned performance, power and area when building ARM Processors, Graphics and System IP.
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Embedded Memory IP IP
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- Ethernet MAC IP, 10/100/1G Ethernet MAC, DMA (Direct Memory Access) function embedded, Soft IP
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- Memory Controller for embeded systems supporting SDRAM and NandFlash, with bootstrap loader