English
You are here:
High Density Via Programmable ROM Compiler - TSMC 16 nm CLN16FPLL001
ARM offers an array of silicon proven SRAM, Register File and ROM memory compilers for all types of SoC designs ranging from performance critical to cost sensitive and low power applications. As part of the ARM Processor / Graphics Optimized packages, ARM Fast Cache Instances deliver tuned performance, power and area when building ARM Processors, Graphics and System IP.
View High Density Via Programmable ROM Compiler - TSMC 16 nm CLN16FPLL001 full description to...
- see the entire High Density Via Programmable ROM Compiler - TSMC 16 nm CLN16FPLL001 datasheet
- get in contact with High Density Via Programmable ROM Compiler - TSMC 16 nm CLN16FPLL001 Supplier
Embedded Memory IP IP
- The SST SuperFlash® IP is an embedded CMOS Flash memory IP with sector/chip Erase and byte Program capability.
- UFS IP for high-performance, low-power interface targeting embedded or removable non-volatile mass storage memory devices
- Customizable Embedded Multi-port PCIe Switch
- UMC 40nm embedded high voltage (eHV) low power Process standard synchronous high density single port register file SRAM memory compiler.
- UMC 0.11um Embedded High Voltage Mask Reduction AL Process standard synchronous high density single port SRAM memory compiler.
- MCU with integrated 64-bit SRAM controller, Memory Protection Unit and real-time, low latency execution unit, optimized for low cost, low power microcontroller and embedded applications