High Dynamic Range (HDR) Pipeline
The logiHDR High Dynamic Range (HDR) Pipeline IP core is prepackaged for Xilinx Vivado IP Integrator (IPI) tool, requires no skills beyond general tools knowledge and can be used in same ways as Xilinx IP cores.
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High Dynamic Range IP
- High Dynamic Range
- Multi (2) Exposures High Dynamic Range (HDR) IP
- Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k
- Metal programmable ROM compiler - Memory optimized for low power and high density - compiler range up to 1024 k
- Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k
- Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k