eUSB 3.1 Gen 2 Device Controller - Software Enumeration, FIFO Interface
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High Performance 8051 Compatible CPU Core
The V805x is a fully synchronous design and contains no microcode; all control is implemented via state machines. It is written in synthesizable VHDL using IEEE standard libraries. It uses a single clock.
The V805x is significantly faster than the original 8051. It can use a faster clock speed than the original and uses fewer clock cycles than the original. The V805x implements the 8051 CPU; you can configure the peripherals you need for your applications (add more ports, timers, peripherals, etc. to make a custom version for your design needs).
The design kit includes the synthesizable VHDL model, a sample synthesis script, a sample constraint file, a VHDL test bench, and test stimulus files.
VLSI Concepts can provide customization of the design, if requested.
Design and integration assistance is also available from VLSI Concepts.
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