Ultra-Low Power 6 - 13 Bit 0.5 -10 kS/s 10μW Analog Front End
High Speed and Density Single Port SRAM Compiler - UMC 180 nm L180LL
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Embedded Memory IP IP
- The SST SuperFlash® IP is an embedded CMOS Flash memory IP with sector/chip Erase and byte Program capability.
- UFS IP for high-performance, low-power interface targeting embedded or removable non-volatile mass storage memory devices
- UMC 40nm embedded high voltage (eHV) low power Process standard synchronous high density single port register file SRAM memory compiler.
- UMC 0.11um Embedded High Voltage Mask Reduction AL Process standard synchronous high density single port SRAM memory compiler.
- Memory Controller for embeded systems supporting SDRAM and NandFlash, with bootstrap loader
- MCU with integrated 64-bit SRAM controller, Memory Protection Unit and real-time, low latency execution unit, optimized for low cost, low power microcontroller and embedded applications