MIPI C-PHY v1.0 D-PHY v1.2 RX 2 trios/2 Lanes in TSMC (12nm, N5)
Highly configurable high-speed serial link controller
* SpaceFibre controller (GRSPFI)
* WizardLink controller (GRWIZL)
* ...or both (GRHSSL)
Thanks to the DMA engine, receive and transmit data are autonomously transferred between the serial link and the on-chip bus, which in turn can be either AMBA AHB or AXI.
View Highly configurable high-speed serial link controller full description to...
- see the entire Highly configurable high-speed serial link controller datasheet
- get in contact with Highly configurable high-speed serial link controller Supplier