ZSP500 offers the ideal DSP performance needed for audio, voice and baseband processing in various applications like DTV, IP phones, set-top boxes, mobile handsets and other similar devices.
- Dual-mac superscalar DSP core capable of executing up to 4 instructions per cycle.
- High precision multiplication with 40 bit accumulation.
- Compact instruction set
- High speed Z.Turbo coprocessor port to allow user-defined extensions
- Most instructions execute in 1 ZSP clock cycle, resulting in the best performance and power efficiency
- 32MB addressable space
- Tightly coupled instruction and data memory
- AHB interface
- Multiple low power modes of operation
- Integrated low latency interrupt controller, timers and optional peripherals
- Based on scalable ZSP superscalar architecture – reuse software as application evolves
- Compiler friendly architecture - orthogonal instruction set
- Very good code density
- Optimal balance of performance, power and area to meet the most stringent application requirements.
- Easy to use, easy to program
- Broad portfolio of optimized field proven application software, cutting edge development tools, complete ecosystem and exceptional services to help users from concept to market.