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HiGig Ethernet MAC
The HiGig™ MAC transmits and receives data between a host processor and a HiGig™ / Ethernet network that enables networking customers to add features like quality of service (QoS), port trunking, mirroring across devices, and link aggregation at higher layers of the OSI network model. The HiGig™ MAC ensures that the Media Access rules specified in the 802.3ae IEEE standard and HiGig™ Protocol definitions are met while transmitting a frame of data over Ethernet. On the receive side, it extracts the different components of a frame and transfers them to higher applications through a FIFO interface.
The HiGig™ / Ethernet MAC IP core is a user-configurable IP core, which allows the configuration of the IP and generation of a netlist and simulation file for use in designs. Please note that generating a bitstream may be prevented or the bitstream may have time logic present unless a license for the IP is purchased. The HiGig™ MAC IP core from Lattice supports the LatticeECP3 and LatticeSC/M FPGA families.
HiGig™, HiGig2™ are trademarks of Broadcom Corporation.
The HiGig™ / Ethernet MAC IP core is a user-configurable IP core, which allows the configuration of the IP and generation of a netlist and simulation file for use in designs. Please note that generating a bitstream may be prevented or the bitstream may have time logic present unless a license for the IP is purchased. The HiGig™ MAC IP core from Lattice supports the LatticeECP3 and LatticeSC/M FPGA families.
HiGig™, HiGig2™ are trademarks of Broadcom Corporation.
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Block Diagram of the HiGig Ethernet MAC IP Core
