xSPI Host Controller
• JEDEC xSPI (JESD251) v1.0
• JESD216C rev. 0.6
• Octal SPI – manufactured by Micron and Macronix
• HyperFlash – manufactured by Cypress
• QSPI – multiple vendors supported
The Host Controller IP for xSPI connects to a systemon- chip (SoC) host through Arm® AMBA® AXI buses for data interfaces (Slave and Master) and APB bus for the register interface.
The integrated soft combo PHY enables the highest speed clock rates, eliminating the need to generate a reference clock based on the Flash memory clock.
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