MIPI C-PHY v1.0 D-PHY v1.2 RX 2 trios/2 Lanes in TSMC (12nm, N5)
I2C Master / Slave Controller w/FIFO (AXI & AXI-Lite Bus)
Digital Blocks offers I2C Controller Master/Slave, Master only, and Slave only IP with AXI / AHB / APB / Avalon / Qsys Interfaces. In addition, besides interfacing to a CPU, the I2C Controllers can transfer blocks of data directly between System Memory or Registers and the I2C Bus.
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