Design & Reuse
Catalog of SIP Cores
System on Chip design resources

MIPI I3C Basic v1.2 Controller and Target with Secondary Controller, APB or AXI4-Lite

The Digital Blocks DB-I3C-BASIC-MS-APB IP Core connects an embedded processor on the AMBA APB bus to an I3C bus, compliant with the MIPI I3C Basic v1....