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IBM 65nm LPE Process 10Bit 2-Channel 40MHz ADC
The VeriSilicon I65LPEV25_ADC_06 IP is a 2.5V 10Bit 40MHz pipeline analog to digital converter capable of running at up to 80MHz conversion rate in one channel mode or 40MHz in I&Q channel mode，with 2Vp-p input range. The ADC cell implements a pipeline (1.5B per stage) sampling architecture which includes SHA, 8 scaled stages and 2bit flash stage. It has a fully differential structure and the power consumption is dynamically scalable with operating frequency.
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IBM 65nm LPE Process 10Bit 2-Channel 40MHz ADC IP
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