The IEEE 802.11a/b/g core is licensable independent WLAN PHY/physical Layer & WLAN MAC Layer Modem enables customers to develop cost effective Wireless LAN solution.The WLAN PHY Layer Core is developed in VHDL and fixed point DSP based C code as per the IEEE standard and it runs on any DSP and FPGA target and WLAN/WiFi MAC Layer runs on Microprocessor of ARM , Motorola and freescale etc. We can port the same any hardware platform with less effort.
The WLAN standard specifies the PHY for a higher data rate extension in the 2.4 GHz ISM band to the 802.11b standard and uses an Orthogonal Frequency Division Multiplexing (OFDM) modulation system similar to 802.11a.It supports the 802.11b specified data rates of 1, 2, 5.5 and 11 Mbps in DSSS/CCK modulation technique and also includes data rates of 6, 9, 12, 18, 24, 36, 48 and 54 Mbps using OFDM technology.
- Compliant to IEEE 802.11g Standard
- DSSS, CCK and OFDM based Technology
- Supports all data rates and modulation schemes: 1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48 and 54 Mbps (DSSS/CCK/BPSK/QPSK/16-QAM/64-QAM) as per standard
- FEC : Rate of 1/2, 2/3,3/4
- Viterbi Decoder with puncturing of 1/2, 2/3, 3/4
- Supports Channel Estimation and Time domain and Frequency domain equalization
- Timing synchronization - packet detector
- VHDL / DSP Fixed point /Floating point 'C' Source Code and binary file
- VHDL Source code for any Altera / Xilinx FPGA Target Device
- 'C' code for TI DSP / Multi core Soft DSP / Multi Core DSP
- Test environment for the hardware of the IP core consisting of VHDL testbench and test data as well as post-synthesis simulation model or pre-compiled simulation model
- Test script
- Design Flow Documentation