IEEE1588 & IEEE802.1AS PTP Hybrid Clock (HC) core
The HC is intercepting the path between an Ethernet PHY and an Ethernet core that forwards or handles Ethernet frames. Mostly this is used in daisy-chained networks. This allows message injection in parallel to data transfers from/to the Switching Core.
All datasets and algorithms are implemented completely in HW.
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Block Diagram of the IEEE1588 & IEEE802.1AS PTP Hybrid Clock (HC) core
PTP IP
- IEEE1588 & IEEE802.1AS PTP Ordinary Clock (OC) core
- IEEE1588 & IEEE802.1AS PTP Transparent Clock (TC) core
- IEEE1588 & IEEE802.1AS PTP Timestamp Unit (TSU) core
- Fast Ethernet 10/100 802.3 MAC with IEEE 1588 PTP Support
- Gigabit Ethernet MAC with IEEE 1588 PTP Support and AVB for Auto
- 10 Gigabit Ethernet MAC with IEEE 1588 PTP Support and AVB for Auto