English
You are here:
IGAPLLV09A, TSMC CLN12FFC/CLN16FFC General purpose PLL
IGAPLLV09 PLL-based clock generating IP integrates a voltage-controlled oscillator, a phase frequency detector, a charge pump, a loop filter, and three frequency dividers. The PLL optimizes the phase jitter performance with the benefits of limited current consumption and robust VCO architecture. The clock generator circuit incorporates de-skew, bypass and power-down modes, and has separated analog and digital power and grounds for ease of design.
The PLL incorporates several frequency dividers to generate various output frequencies for different applications. The power down mode is available to shut down the power of the PLL circuit. The bypass mode provides to bypass the output clock of PLL to the external reference clock.
The PLL incorporates several frequency dividers to generate various output frequencies for different applications. The power down mode is available to shut down the power of the PLL circuit. The bypass mode provides to bypass the output clock of PLL to the external reference clock.
View IGAPLLV09A, TSMC CLN12FFC/CLN16FFC General purpose PLL full description to...
- see the entire IGAPLLV09A, TSMC CLN12FFC/CLN16FFC General purpose PLL datasheet
- get in contact with IGAPLLV09A, TSMC CLN12FFC/CLN16FFC General purpose PLL Supplier
PLL IP
- TSMC CLN7FF 7nm Clock Generator PLL - 800MHz-4000MHz
- TSMC CLN7FFLVT 7nm Deskew PLL - 300MHz-1500MHz
- TSMC CLN7FF 7nm Spread Spectrum PLL - 700MHz-3500MHz
- Fractional-N Frequency Synthesizer PLL (5nm - 180nm)
- 32kHz Ultra-Fast-Lock IoT PLL
- Ultra-low Jitter Fractional-N Frequency Synthesizer PLL (5nm - 180nm)