As part of INSIDE Secure’s award-winning silicon Intellectual Property (IP) product portfolio, the EIP-38 - AES/GCM/XTS/LRW Engines are specifically suited for next generation processors deployed in networking and storage appliances that need to support combinations of AES (with its regular feedback modes), AES-GCM, AES-XTS and LRW-AES.
The EIP-38 AES/GCM/XTS/LRW Engines do not only meet vendor requirements for very high throughputs, but also for fast integration and cost-effectiveness.
- Wide bus interface
- Basic AES encrypt and decrypt operations
- Key sizes: 128, 192 and 256 bits
- Key scheduling in hardware
- Hardware reverse (decrypt) key generation
- Non-feedback modes: ECB and CTR
- Feedback modes: CBC, OFB (128 bit), CFB (1-, 8- and 128-bit)
- AES-LRW with CTS (D5)
- AES-XTS with CTS1 (D18)
- AES-GCM (using AES-CTR mode and GHASH)
- Basic GHASH operation
- Fully synchronous design
- High-speed AES-XTS / AES-GCM solution
- Data Path Integrity Protection
- Silicon-proven implementation
- Fast and easy to integrate into SoCs
- Flexible layered design
- Complete range of configurations
- World-class technical support
- Hardware Reference and Programmer Manual
- Integration Manual
- Verification Specification
- Synthesizable Verilog RTL source code
- Self-checking RTL test bench, including test vectors and expected result vectors
- Simulation scripts
- Synthesis scripts
- Many different configurations available:
- All modes, GCM+CTR+OFB mode only, or XTS+ECB only mode
- XTS+ECB only modes is also available with Data Path integrity
- Multiple cores ranging from: 1 to 14 cores
- Gate counts ranging : 96-778k gates, depending on mode and number of cores
- up to 1.4 Ghz
- up to 128 bits/clk
- For more information about this product or the all the different configurations, please contact Inside Secure: https://www.insidesecure.com/Contact
- Even though the Advanced Encryption Standard (AES) algorithm was designed to allow high-speed implementations, its regular feedback modes such as CBC, CFB, and OFB are not ideal for supporting very high-speed networking applications.
- The AES-GCM and AES-XTS algorithms do not use these regular AES feedback modes and allow very high-speed encryption and authentication by enabling an implementation to make use of parallelism.
- Typical uses cases for AES-GCM and AES-XTS are high-speed transmission (virtual private networking) and disk storage (protection of data at rest). For transmission protection, AES-GCM can for instance implement authenticated encryption at the network layer (IPsec) or at the data link layer (IEEE 802.1ae).