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Switching regulator, inductor-based, PWM mode, high efficiency, DELTA standard
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INSIDE SECURE Poly1305 Engine
The EIP-53 Poly engine is an efficient hardware implementation of the Poly1305 algorithm, as specified by the Internet Research Task Force (IRTF), RFC7539 standard, and for use in TLS1.3(Draft). The accelerator includes I/O registers and a Poly1305 HASH core.
Designed for fast integration, low gate count, and maximum performance, the Poly1305 Engine provides a reliable and cost-effective IP solution that is easy to integrate into SoC designs.
Designed for fast integration, low gate count, and maximum performance, the Poly1305 Engine provides a reliable and cost-effective IP solution that is easy to integrate into SoC designs.
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Poly IP
- 10-Bit 160MS/s Dual Current Steering DAC
- eUSB 2.0 PHY Repeater - TSMC 28hpcp18 x1, North/South (vertical) poly orientation
- PCIe 4.0 PHY, SS 11LPP x4, North/South (vertical) poly orientation
- MIPI C-PHY v1.0 D-PHY v1.2 TX 3 trios/4 Lanes - TSMC 7FF 1.8V, North/South Poly Orientation
- MIPI C-PHY v1.0 D-PHY v1.2 RX 3 trios/4 Lanes - TSMC 12FFC 1.8V, North/South Poly Orientation
- Poly Phase CMOS Programmable Frequency Divider (50-2400 MHz)