Interlaken Core (Up to 600G)
Interlaken is a scalable chip-to-chip interconnect protocol designed to enable transmission speeds from 10Gbps to 150Gbps. The Interlaken specification minimizes the pin and power overhead of chip-to-chip interconnect and features a flexible protocol layer which provides a scalable solution that can be used throughout an entire system. In addition, Interlaken uses two levels of CRC checking and a self-synchronizing data scrambler to ensure data integrity and link robustness. Xilinx Interlaken IP Core based on Sarance Technologies Intellectual Property is optimized for Xilinx Gigabit Transceiver technology and is delivered as a netlist implemented in Virtex FPGA families. The core is compliant with the Interlaken Protocol Definition, Revision 1.2, and offers system designers with a risk-free and quick path for adopting Interlaken as their chip-to-chip interconnect protocol.
Features
- Support for up to 600 Gbps of throughput
- Data striping and de-striping across 1 to 24 lanes
- Programmable BurstMax, BurstMin, BurstShort and MetaFrameSize parameters
- Support for Synchronization, Scrambler State, Diagnostic, and Skip Word Block Types
- Data bus width of 64, 128, 256 or 512, 1024, 1536, or 2048 bits
- Channel-level and link-level flow control mechanism
- Full error checking and recovery as defined by Interlaken specification
- Look-Aside (LA) mode support
View Interlaken Core (Up to 600G) full description to...
- see the entire Interlaken Core (Up to 600G) datasheet
- get in contact with Interlaken Core (Up to 600G) Supplier
Communication
- Multifunctional DSP Architecture for High-Performance, Low-Power Audio/Voice/Sensing and Wireless Communication Applications
- Highly powerful, multi-mode communication processor for IoT wireless applications
- Highly powerful and scalable multi-mode communication processor for IoT wireless applications
- World's most advanced communication DSP, providing cutting-edge performance for multi-Gigabit class connectivity
- 26262 CetraC Gateway/Concentrator Realtime Communication For Autonomous Driving
- Reed Solomon Multi Giga bit (up to 50Gbps) FEC Encoder/Decoder for GF(256)