The S3RFPAISM5G8T18 has been designed for use in high performance wireless communications systems requiring a combination of high output power and low noise performance and high efficiency.
The Power amplifier is driven from a 50Ohm source and drives a 50Ohm load. No external matching components are requred. The PA can provide 24dBm to 27dBm peak power to the 50Ohm load. The output power is achieved by combining power from four sub amplifiers operating in parallel. The PA design is differential but the input and output are both single ended. A balun is used on the input to convert the single ended signal to differential and a power combiner is used on the output to combine the power from sub amplifiers and to convert to single-ended.
The amplifier is biased using a PTAT current source which minimizes variation over temperature. The temperature slope and the value of the bias current for each PA are programmable. The power supply voltage of the PA also needs to be programmable.
This IP and its component sub-blocks, may be tailored for specific system implementation requirements and/or may be optimally integrated with our broad portfolio of RF Building Block IP.
The PA can be cost-effectively ported across foundries and process nodes upon request.
- TSMC 0.18 µm RF CMOS process
- 3V and 0.9V Power Supply
- 24dBm to 27dBm output power
- Switched mode operation for high efficiency
- Fully differential architecture for high noise immunity
- Variable Biasing for backed off operation and power control
- Integrated power combiner and Balun
- No external matching components required
- Low Noise Density
- 5.8GHz Band Operation
- Power-Down and Reset Modes
- High Power Efficiency
- Compact Die Area
- Integrated Bias Circuitry
- Built-in bandgap bias block available
- The S3RFPAISM5G8T18 can be re-tuned to different frequencies through retuning of the power combiner network
- The S3RFPAISM5G8T18 is intended for combination with our wide portfolio of RFIP and for reconfiguration to a customer’s particular requirements.
- Characterization Report
- Flat Netlist (cdl)
- Layout View (gds2)
- Abstract View (lef)
- Timing View (lib)
- Behavioural Model (Verilog .v)
- Integration Guidelines and Support
- (Subject to Agreement)
- Satellite Communications
- Multi-mode and multi-band wireless systems
- Customizable for various wireless applications
Block Diagram of the ISM Band RF Power Amplifier IP Core