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JPEG 2000 decoder for high-speed applications (up to multi-channel DCI 2K and 4K, HD 1080i and 1080p)
Capitalizing on its long-term experience with JPEG 2000 hardware coding, Silex Insight has extended its JPEG 2000 portfolio by releasing a new compact real-time hardware decoder engine that is optimized for Digital Cinema and High-Definition video applications. The core architecture offers a flexible and high-speed solution to the performance challenges of cinema, broadcast and post-production applications. It is able to sustain the high decoding requirements of the large DCI frame formats, including 4096x2160 resolution and frame rates up to 48 frames per second.
The BA109 IP core is a JPEG 2000 hardware decoder dedicated to DCI (Digital Cinema Initiatives) and HD video applications. It decodes streams compliant with the ISO/IEC 15444-1 specification (JPEG 2000). It is compliant with the DCI recommendation for video coding. It applies JPEG 2000 decoding on un-tiled large color frames with 4:4:4, 4:2:2 or 4:2:0 sub-sampling.
The core performs the complete video decompression operations of the normalized decoding process: stream parsing and header decoding, entropy decoding, inverse quantization, inverse discrete wavelet transform (IDWT) and inverse color transform (ICT/RCT). It supports a JPEG 2000 j2c file at its input interface and generates decoded samples at its output interface under the following formats: 4:4:4, 4:2:2 or 4:2:0 color mode with 12-bit samples.
The core is optimized for speed and is able to deal with the demanding DCI and HD processing speeds: it is able to provide a single-chip FPGA solution for all 2K @24 fps, 2K @48fps, 4K @24fps, 720p30/60, 1080i and 1080p30/60 distributions. The flexible FPGA architecture allows the user to build a secure decoder by integrating Silex Insight cryptography decoders (DCI AES).
The BA109 IP core is a JPEG 2000 hardware decoder dedicated to DCI (Digital Cinema Initiatives) and HD video applications. It decodes streams compliant with the ISO/IEC 15444-1 specification (JPEG 2000). It is compliant with the DCI recommendation for video coding. It applies JPEG 2000 decoding on un-tiled large color frames with 4:4:4, 4:2:2 or 4:2:0 sub-sampling.
The core performs the complete video decompression operations of the normalized decoding process: stream parsing and header decoding, entropy decoding, inverse quantization, inverse discrete wavelet transform (IDWT) and inverse color transform (ICT/RCT). It supports a JPEG 2000 j2c file at its input interface and generates decoded samples at its output interface under the following formats: 4:4:4, 4:2:2 or 4:2:0 color mode with 12-bit samples.
The core is optimized for speed and is able to deal with the demanding DCI and HD processing speeds: it is able to provide a single-chip FPGA solution for all 2K @24 fps, 2K @48fps, 4K @24fps, 720p30/60, 1080i and 1080p30/60 distributions. The flexible FPGA architecture allows the user to build a secure decoder by integrating Silex Insight cryptography decoders (DCI AES).
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JPEG 2000 decoder IP
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