The 12-Bit JPEG IP core is conformed to the JPEG baseline format/JPEG Extended DCT-based process for compressing/decompressing 8bit/12bit still images.
- Based on JPEG Extended DCT-based process/Baseline process Standards.
- The arithmetic accuracy also satisfies the requirement of compliance testing of JPEG Part2 ISO/IEC10918-2j.
- Image Data I/O Format:Block Interleaved Format
- Image Size:Any size that can be divided by MCU unit.
- Operation mode like processing mode, image size, DRI value etc. are set in internal register via external CPU.
- Quantization table:Written from external during compression.
- Huffman table:Fixed table is used for compression (SHIKINO original table is used for 12bit JPEG.Standard table is used for 8bit JPEG) and downloaded from compressed data during decompression.
- Marker:Automatically generated during compression.Processed marker: SOI, SOF0, SOF1, SOS, DQT, DHT, DRI, RSTm, EOI
- RTL Source (Verilog-HDL)
- Logic synthesis scripts
- Test vectors
- Reference C-MODEL
- IP specification file
- Design specificaions file
- C-MODEL manual file
- Digital still cameras
- Video Phones
- Image scanner
- External board for PC
- Surveillance systems
- Image transfer devices
- Mobile terminals
- Smart phone
- Tablet devices
- Medical devices
Block Diagram of the JPEG Codec 4K(YUV422) 96fps@200MHz,