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JPEG Decoder and Encoder IP
JPEG codec is designed to provide high performance solution for jpeg decoder and encoder. JPEG codec is fully compliant with the baseline and extended sequential DCT mode of ISO/IEC 10918-1 JPEG standard. It also part compliant with ISO/IEC 18477 for supporting 10/12bit sample size.
JPEG codec is in-built Variable Length Decode/Encode (VLD/VLC), Inverse Scan/Scan (IS/S), Inverse Quantization/ Quantization (IQ/Q), Inverse Discrete Cosine Transform/ Discrete Cosine Transform (IDCT/DCT), Scaling down hardware engine. JPEG Engine architecture with based on MCU layer.
On the fly pre and post image processing can support scaling , rotation and color space conversion. 32bit APB/128bit AXI standard interface make the integration is more convenient and efficient.
JPEG codec is in-built Variable Length Decode/Encode (VLD/VLC), Inverse Scan/Scan (IS/S), Inverse Quantization/ Quantization (IQ/Q), Inverse Discrete Cosine Transform/ Discrete Cosine Transform (IDCT/DCT), Scaling down hardware engine. JPEG Engine architecture with based on MCU layer.
On the fly pre and post image processing can support scaling , rotation and color space conversion. 32bit APB/128bit AXI standard interface make the integration is more convenient and efficient.
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Block Diagram of the JPEG Decoder and Encoder IP IP Core
