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Laser Programmable Fuse Box Compiler - TSMC 90 nm CLN90G
ARM offers an array of silicon proven SRAM, Register File and ROM memory compilers for all types of SoC designs ranging from performance critical to cost sensitive and low power applications. As part of the ARM Processor / Graphics Optimized packages, ARM Fast Cache Instances deliver tuned performance, power and area when building ARM Processors, Graphics and System IP.
Deliverables
- Front End (FE) and Back End (FB) views with full suite of design views and models that support most of the industry's popular design tools can be downloaded from the ARM DesignStart web site at: http://www.arm.com/support/designstart.php
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Embedded Memory IP IP
- The SST SuperFlash® IP is an embedded CMOS Flash memory IP with sector/chip Erase and byte Program capability.
- UFS IP for high-performance, low-power interface targeting embedded or removable non-volatile mass storage memory devices
- UMC 80nm Embedded High Voltage process standard synchronous high density single port SRAM memory compiler.
- Embedded synchronous single port SRAM/ROM memory controller with AXI slave port.
- FAB1 0.18um 1.8V/5V Embedded Memory Flash Ultra LL Process miniLib+_x000D_
- MCU with integrated 64-bit SRAM controller, Memory Protection Unit and real-time, low latency execution unit, optimized for low cost, low power microcontroller and embedded applications