Laser Programmable Fuse Box Compiler - TSMC 90 nm CLN90G
Deliverables
- Front End (FE) and Back End (FB) views with full suite of design views and models that support most of the industry's popular design tools can be downloaded from the ARM DesignStart web site at: http://www.arm.com/support/designstart.php
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Embedded Memory IP
- The SST SuperFlash® IP is an embedded CMOS Flash memory IP with sector/chip Erase and byte Program capability.
- General purpose microprocessor incorporating a high performance L1 cache controller and virtual memory management support for high performance embedded system applications
- MCU with integrated 64-bit SRAM controller, Memory Protection Unit and real-time, low latency execution unit, optimized for low cost, low power microcontroller and embedded applications
- UFS IP for high-performance, low-power interface targeting embedded or removable non-volatile mass storage memory devices
- 32-bit OTP anti-fuse memory IP with embedded redundancy mechanism and margin check
- Embedded FPGA cores in TSMC 22ULP/28HPC/HPC+