LCD/HDMI Video output Interface supports various display modes and programmable display sizes. This core formats the incoming active video input into clocked video output by generating horizontal and vertical synchronization information and inserting horizontal and vertical blanking.
- Display modes
- RGB 4:4:4, RGB 5:5:5, RGB 5:6:5, RGB 6:6:6, RGB 8:8:8
- Supports programmable display size
- Supports progressive type of displays
- Programmable pixel clock frequency
- Programmable polarity of output enable, frameclock & line cloc
- Simple design makes it easier to integrate in many FPGA families.
- Video output resolution can be programmable from QCIF to Hull HD
- Can be used to generate accurate timing for multiple displays like LCD, VGA and HDMI
- Can be used in all sorts of applications including consumer, entertainment , industrial and automotive which use LCDs
Block Diagram of the LCD/HDMI Video Output Interface IP Core