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LDO voltage regulator (output voltage 1.8 V)
The voltage regulator consists of a differential amplifier which compares reference voltage with voltage from a feedback divider. It adjusts the impedance of a PMOS transistor for stabilization of output voltage at a set level.
Input voltage: 2.4...3.6 V
Output voltage: 1.8 V
Maximum load current: 10 mA
The block is fabricated on TSMC SiGe BiCMOS 0.18 um technology.
Input voltage: 2.4...3.6 V
Output voltage: 1.8 V
Maximum load current: 10 mA
The block is fabricated on TSMC SiGe BiCMOS 0.18 um technology.
Features
- TSMC BiCMOS SiGe 180 nm
- Low drop out
- Low current consumption
- Supported foundries: TSMC, UMC, Global Foundries, SMIC, iHP, AMS, Vanguard, SilTerra
Deliverables
- Schematic or NetList
- Abstract model (.lef and .lib files)
- Layout view (optional)
- Behavioral model (Verilog)
- Extracted view (optional)
- GDSII
- DRC, LVS, antenna report
- Test bench with saved configurations (optional)
- Documentation
Applications
- Supply voltage sensitive circuits
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