English
Symmetric Cryptography Engine: High Performance AES-GCM/CTR IP Core
You are here:
LDO With ULP Ludicrous Mode
SGC77100_GF_22FDSOI is a low-dropout, high current, fast response linear regulator for integration on SoC. Presenting high stability and robust regulation, while maintaining low dropout and ultra low quiescent, it is the ideal solution for IoT applications. Offering good PSRR, soft start and over current protection, the SGC77100_GF_22FDSOI provides an innovative Ludicrous Ultra Low Power Mode that guarantees a quiescent reduction, with the load down, to virtually “0” quiescent. Being specified from TJ = –40°C to +125°C, it is designed to achieve 3% overall accuracy (over Load / Line / Temp)
View LDO With ULP Ludicrous Mode full description to...
- see the entire LDO With ULP Ludicrous Mode datasheet
- get in contact with LDO With ULP Ludicrous Mode Supplier
LDO IP
- Ultra-low quiescent LDO voltage regulator in TSMC 22ULL
- 5nm FinFET, 20mA LDO Voltage Regulator (Power Quencher™)
- 40nm 1.8V Programmable 1.1V LDO Regulator with 50mA max. output
- Power Quencher® Capless LDO for SoC Integration and Hardware Security (22 nm, 500 mA, excellent quiescent current for IoT)
- Power Quencher® Capless LDO for SoC Integration and Hardware Security (22 nm, 0.1 mA, excellent quiescent current for IoT)
- Capless 1.8V output LDO with 2.0-3.6V input range - SMIC 0.18 EF