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Lightweight Single-core Multi-Purpose Processor for IoT
CEVA-X1 is primarily aimed at multi-mode IoT and M2M endpoint and hub devices as a combined control and DSP processor to run concurrently both protocol stack and baseband PHY for cellular, LPWA and short range communications such as:
- LTE Cat-NB1, Cat-M1, Sigfox, LoRa,
- WiFi 802.11n, 802.11ah, Bluetooth, BLE, Zigbee/Thread
As a multi-mode IoT and M2M processor CEVA-X1 can also run positioning and sensor functions such as:
- GNSS: GPS, Beidou, GLONASS, Galileo,
- Fusion of multiple indoor positioning and activity sensors (beacons, accelerometer, gyroscope, magnetometer, …),
- Voice activation,
- Vocoder
Multi-mode use cases include:
- Asset and person trackers for children, dogs, cars, trucks, containers, bikes, …
- Geo-fencing to inform server when person or asset leaves area,
- Identification and position of large fleet of fixed devices such as smart meters, city sensors for smart parking, lighting, environment,
- IoT hub with concurrent cellular and short range communications
- Sensor fusion for activity trackers in wearables,
- Wearalone with cellular and short range communications and narrow-band vocoder,
- Voice activation with speech command recognition
CEVA-X1 has been specifically designed as a single core LTE Cat-NB1/M1 solution with dedicated instructions to optimize overall system power, performance and area for:
- Protocol stack encryption functions as well as,
- Baseband channel coding/decoding functions.
Control performance has also been optimized on CEVA-X1 for efficient Protocol Stack execution with
- Full RTOS support,
- Dynamic branch prediction,
- Instruction and data caches.
Lastly CEVA Connect, Advanced System Control is designed to offload CEVA-X1 from HW Accelerators control and traffic management tasks for LTE Cat-M1, FeMTC and WiFi.
These features all contribute greatly to reduce power and area and achieve 5 to 10 year single battery operation at very low price.
- LTE Cat-NB1, Cat-M1, Sigfox, LoRa,
- WiFi 802.11n, 802.11ah, Bluetooth, BLE, Zigbee/Thread
As a multi-mode IoT and M2M processor CEVA-X1 can also run positioning and sensor functions such as:
- GNSS: GPS, Beidou, GLONASS, Galileo,
- Fusion of multiple indoor positioning and activity sensors (beacons, accelerometer, gyroscope, magnetometer, …),
- Voice activation,
- Vocoder
Multi-mode use cases include:
- Asset and person trackers for children, dogs, cars, trucks, containers, bikes, …
- Geo-fencing to inform server when person or asset leaves area,
- Identification and position of large fleet of fixed devices such as smart meters, city sensors for smart parking, lighting, environment,
- IoT hub with concurrent cellular and short range communications
- Sensor fusion for activity trackers in wearables,
- Wearalone with cellular and short range communications and narrow-band vocoder,
- Voice activation with speech command recognition
CEVA-X1 has been specifically designed as a single core LTE Cat-NB1/M1 solution with dedicated instructions to optimize overall system power, performance and area for:
- Protocol stack encryption functions as well as,
- Baseband channel coding/decoding functions.
Control performance has also been optimized on CEVA-X1 for efficient Protocol Stack execution with
- Full RTOS support,
- Dynamic branch prediction,
- Instruction and data caches.
Lastly CEVA Connect, Advanced System Control is designed to offload CEVA-X1 from HW Accelerators control and traffic management tasks for LTE Cat-M1, FeMTC and WiFi.
These features all contribute greatly to reduce power and area and achieve 5 to 10 year single battery operation at very low price.
Features
- CEVA-X1 Key features
- VLIW/SIMD architecture
- 10 stage pipeline
- 4-way VLIW
- 64 bit memory bandwidth
- 3.3 Coremark/MHz
- Dual-MAC 16x16 per cycle
- 32-bit SIMD Fixed-Point Operations
- IEEE Single-Precision Floating-Point Operations
- 1.5GHz operating frequency in 16nm FF
- Instruction and Data Caches
- Dynamic Branch Prediction
- CEVA-Connect Technology to schedule Hardware Accelerators control and data planes
- Controller features
- Compact code size
- One scalar operations per cycle
- Zero latency ISA
- Static branch prediction
- Optional dynamic branch prediction
- 32-bit HW division and multiplication
- Ultra-fast context switch
- Supervisor and User modes
- Semaphores
- DSP features
- One SPU (Scalar Processing Unit)
- Two 16x16 MAC per cycle
- One 32x32 MAC per cycle
- 32-bit SIMD processing
- 8/16/32/64 bit data type support
- 8/16/32/64 bit ALU operations
- Two 16-bit operations per cycle
- One 32-bit operations per cycle
- One 64-bit operations per cycle
- Optional single-precision IEEE floating point in SPU
- Loop buffer
- Dedicated instructions for LTE Cat-M1/NB1 modems
- Encryption, Compression
- Channel coding/decoding, FFT
- System features
- Data Cache
- 2-Way set-associative cache
- Write-through and write-back policies
- Non-blocking read and write on cache miss
- Hardware and software pre-fetch capabilities
- Instruction Cache
- 4-Way set-associative cache
- Non-blocking read on cache miss
- Hardware and software pre-fetch capabilities
- CEVA-Connect
- Offload the processor with dedicated HW control and data planes
- Hardware queue and buffer managers for controlling the data flow in the PHY
- Intelligent scheduling with high QoS and very low latency
- Data traffic management
- Special interfaces to connect multiple accelerators / DSP
- High throughput system interfaces
- IoT sub-system with peripherals and interfaces
Benefits
- Exceptional power efficiency
- Incorporates Power Scaling Unit (PSU 2.0)
- Enhanced power-optimized pipeline
- Optimized for battery-operated and stationary devices
- Scalable, configurable and modular multi-mode wireless IoT processor for protocol, baseband and sensor/positioning algorithms
- Scalable computation capabilities and memories
- Configurable utilization of optional instruction sets
- Includes tightly coupled memories (TCM), caches, AXI and AHB -system interfaces, APB interface, advanced DMA controller, CEVA-Connect, message queues, emulation and profiling modules.
- Ensures easy integration and optimal performance in Target SoCs
- Smooth C-level software development and easy integration into the target SoC reduces risk and time-to-market
- Advanced IDE
- Optimizing C compiler
- Cycle-accurate simulation and graphical profiling of the entire DSP sub-system
- Macro assembler, linker, and GUI debugger
- RTOS
- LTE Libraries for LTE Cat-M1/NB1
- DSP Libraries
- Smooth migration path from off the-shelf ASSPs
- MATLAB bi-directional connectivity (optional)
- Open architecture and standardized APIs to allow Additional software components can be easily developed or licensed through CEVA’s partners
Block Diagram of the Lightweight Single-core Multi-Purpose Processor for IoT
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