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LIN 2.2, 2.1 and 1.3 Protocol Controller IP
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Block Diagram of the LIN 2.2, 2.1 and 1.3 Protocol Controller IP IP Core
LIN Bus IP IP
- LIN Bus Master/Slave Controller Core
- LIN Bus Controller – Basic and Safety-Enhanced
- Local Interconnect Network (LIN) Soft Controller IP
- Configurable UART with FIFO, software and hardware flow control
- High Speed UART IP core - Universal Aysynchronous Receiver / Transmitter
- 8-bit FAST Microcontrollers Family