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Low complexity Turbo Product Code decoder
TC3401 is 2D TPC decoder with an architecture that favors compact core logic and targets medium speed applications. It supports typically 30 Mbps user rate with low-end FPGA devices and 56 Mbps user rate with high-end FPGA devices. For faster user rate, refer to our TC3404 product. For a more comprehensive TPC, refer to our TC30xx family.
Features
- Compact core logic
- Support all modes of IEEE-802.16a TPCs
- Highly programmable
- On-the-fly change of code (packet level)
- Reduced latency (bank-swapping option)
- Dedicated or Micro-controller interface
Benefits
- T3401 has been developed for cost-sensitive applications using low-end devices (e.g. Cyclone2 or Spartan3). This is a good solution for VSAT and similar applications.
Deliverables
- Synthesized FPGA netlist for Altera's or Xilinx's
- Behavioral C-model library
- RTL-model library for Modelsim
- SW executable for test vector generation
- Test bench VHDL source code
- Documentation
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