Low latency AVC Encoder IP Core is an uncompromising solution for custom projects, the requirements of which include high performance, low latency, ease of editing the encoded stream and guaranteed quality compression. IP core is extremely compact and has features which are sufficient for use in video surveillance, computer vision, and video conferencing. IP Core can be easily integrated into the project and user-oriented work in the FPGA low price range.
ITU-T H.264 recommendations describes a wide range of methods and tools for efficient video compression. Feasibility of each of the features and profile of the AVC specification depends on the use case of video compression. We offer the best core functionality required to maximize the quality of the video stream with minimal latency.
Our H.264 Encoder cores use very simple interfaces to communicate with external logic. The core is setup by means of a control register set. The default values for most parameters may be pre-configured to custom specifications. Input and output interfaces support data streaming mode and allow external logic to control the flow of data.
- Fully compliant with the requirements of ISO / IEC 14496-10/ITU-T H.264;
- Profile - Main, resolution up to 4K;
- The type of slice - Intra, macroblock - 4x4;
- The type of rate control - CQ (constant quality);
- Entropy codec - CABAC;
- Extremely low latency;
- No need for external control processor;
- No need for external memory;
- IP Core is available as either netlist or VHDL source codes.
- It includes all that requires for easy implementation in the customer projects. The delivery includes:
- Synthesized netlist for target FPGA device;
- Testbench and bit accurate model (Pure C);
- Place@Rout script;
- Simulation script
- Detailed specification and implementation guide.