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USB 3.1 SuperSpeed+ (Gen2) Dual-Role Device Controller (USB-IF Certified)
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Low Noise Programmable PLL
This customisable PLL has been designed for use with high performance A/D converters, where low jitter clock generation is critical.
An integer N PLL is used as it yields excellent phase noise performance.
The PLL is designed to provide excellent jitter performance while also maintaining low current consumption.
An integer N PLL is used as it yields excellent phase noise performance.
The PLL is designed to provide excellent jitter performance while also maintaining low current consumption.
Features
- CSM 65nm LPE process
- 3.3V and 1.2V supplies
- Input Frequency: 27MHz
- VCO Frequency: 972MHz, 1026MHz and 1080MHz
- Output Frequencies: 243MHz, 256.5MHz or 270MHz
- Period Jitter: < 6ps rms
- Power Dissipation: < 13mW
- Power-down and bypass modes
- No external components
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PLL
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- TSMC CLN7FFLVT 7nm Deskew PLL - 300MHz-1500MHz
- Fractional-N Frequency Synthesizer PLL (5nm - 180nm)
- Ultra-Low-jitter Ring PLL