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PCIe 5.0 Controller supporting Endpoint, Root Port, Switch, Bridge and advanced features
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Low Power Fractional PLL IP in TSMC(12/16nm FFC, 22nm ULP/ULL, 28nm HPC+)
M31 LPFPLL is a low-power programmable fractional-N (LPF), phase-locked loop (PLL) for frequency synthesis. It can support a wide range of output frequency with fine resolution, as well as supporting multiple input reference frequencies. M31 LPFPLL is ideal for the use in noisy ASIC/SoC environment due to the excellent supply noise immunity. Lockdetect flag supports real-time monitoring of the phase-locked status. With embedded ESD power clamp circuits and internal initial sequence applied to release from complex configurations and settings, M31 LPFPLL is available as a single macro and can be integrated into any ASIC/SoC easily
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Block Diagram of the Low Power Fractional PLL IP in TSMC(12/16nm FFC, 22nm ULP/ULL, 28nm HPC+)
Low Power Fractional PLL IP
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