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Low Power LDO（LV/5Vto1.2）_HHNEC_130_EF
This IP offers excellent ac performance with very low ground current. It is stable with multiple ESR load capacitors. As a low power LDO, it uses a precision voltage reference and feedback loop to achieve about 700nA quiescent current. It is fully specified from TJ =-40℃ to +125℃. This building block has been designed in HHNEC 0.13um EFLASH process.
Features
- 1. Ultra-low power LDO static current (<1uA in typical case)
- 2. 10mA low dropout regulator with input switched power supply
Benefits
- Ultra-low power LDO
Deliverables
- 1.Datasheet
- 2.Characterization Report
- 3.Flat Netlist (cdl)
- 4.Layout View (gds2)
- 5.Abstract View (lef)
- 6.Timing View (lib)
- 7.Behavioral Model (Verilog)
- 8.Integration Support
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