LPDDR2/3 DDR2/3 Combo PHY TSMC 40 LP

The INNOSILICON DDRIP TM Mixed-Signal DDR3-1600 Combo PHYs with standard DFI interface provide the most complete physical interface solution in the industry for ICs requiring access to various JEDEC compatible SDRAM devices. It is optimized for low power and high speed up to 1600Mbps for DDR3 & Low voltage DDR3) applications with robust timing and small silicon area. IN 40nm and 0.13um, we have option to support DDR1 as well. Low speed or high speed PHY may differ for optimal area/speed trade-off based on customer needs. It supports all JEDECDDR3 SDRAM components in the market. The PHY components contain DDR specialized functional and utility SSTL I/Os, critical timing synchronization module (TSM) and a low power/jitter DLLs with programmable fine-grain control.

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