A Lattice FPGA based LPDDR3 solution – The Lattice Low Power Double Data Rate (LPDDR3) Synchronous Dynamic Random Access Memory (SDRAM) Controller is a general-purpose memory controller that interfaces with industry standard LPDDR3 memory devices and modules compliant with the JESD-209.3 specification.
Easily integrate LPDDR3 into your design – This IP core reduces the efforts required to integrate the LPDDR3 memory controller with the remainder of the customer design.
Features * Interfaces to Industry Standard LPDDR3 SDRAM components and modules compliant with the JESD-209.3 specification
* High-Performance LPDDR3 performance, up to 400 MHz/800 Mbps operation
* Supports automatic LPDDR3 SDRAM initialization and refresh
* Supports Deep Power Down Mode
The LPDDR3 SDRAM Controller is available as a Clarity Designer user configurable IP core, which allows the configuration of the IP and generation of a netlist and simulation file for use in designs. Please note that generating a bitstream may be prevented or the bitstream may have time logic present unless a license for the IP is purchased.