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180nm FTP Non Volatile Memory for Standard CMOS Logic Process
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LVDS 10 bits dual port transmitter
The LVDS transmitter supports transmission between the host and the flat panel display to SXGA resolutions. The transmitter converts 30 bits (10-bits/color) of CMOS/TTL data and 3 control bits into 5 LVDS (Low Voltage Differential Signal) data streams. The
Transmitter contains four 7 bits parallel-load, serial-out shift registers, a 7X clock synthesizer, and five low-voltage differential
-signaling (LVDS) line drivers in a single integrated circuit. At a maximum input clock rate of 170MHz, each LVDS differential data pair speed is 1190Mbps, providing a total throughput of 11.9Gbps
Transmitter contains four 7 bits parallel-load, serial-out shift registers, a 7X clock synthesizer, and five low-voltage differential
-signaling (LVDS) line drivers in a single integrated circuit. At a maximum input clock rate of 170MHz, each LVDS differential data pair speed is 1190Mbps, providing a total throughput of 11.9Gbps
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