LVDS 10 bits dual port transmitter
Transmitter contains four 7 bits parallel-load, serial-out shift registers, a 7X clock synthesizer, and five low-voltage differential
-signaling (LVDS) line drivers in a single integrated circuit. At a maximum input clock rate of 170MHz, each LVDS differential data pair speed is 1190Mbps, providing a total throughput of 11.9Gbps
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LVDS Tx IP
- IGALVDT08B, TSMC CLN28HPM LVDS TX/RX Combo IO
- A 130nm Wirebond IO library with 3.3V GPIO, LVDS TX & RX, 3.3V I2C open-drain, analog cell and OTP program cell
- A 65nm Wirebond IO library with 2.5V GPIO, LVDS TX & RX and 2.5V analog / RF
- LVDS RX & TX IOs in TSMC and GlobalFoundries Technologies
- 10-bit dual-port 30MHz ~ 85MHz LVDS Tx;
- LVDS TX