LVDS IO Pad Set
This 22nm library is available in a staggered CUP wire bond implementation with a flip chip option.
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ESD IP
- ESD solution set for LV & advanced processes
- ESD solution set for HV/BCD processes
- High ESD analog IO library
- Analog I/O + ESD protection for Die-2-die interfaces
- TSMC based IO & ESD solutions supporting GPIO, I2C,RGMII, SD, LVDS, HDMI & analog/RF across multiple technology nodes
- High-voltage solutions in baseline TSMC & GlobalFoundries technologies