MIPI C-PHY v1.2 D-PHY v2.1 RX 2 trios/2 Lanes in TSMC (16nm) for Automotive
LVDS Specialty IO - IBM 45 nm SOI12S0
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Interface IP IP
- Compute Express Link (CXL) 2.0 Controller with AMBA AXI interface
- PCIe 6.1 Controller
- PCIe 5.0 Controller with AMBA AXI interface
- CCIX 1.1 Controller with AMBA AXI interface
- PCIe 4.0 Controller with AMBA AXI interface
- PCIe Controller for USB4 Hosts and Devices supporting PCIe Tunneling, with optional built-in DMA and configurable AMBA AXI interface