Magillem Connectivity is the centerpiece of a powerful, intuitive, single source of truth design
environment. It delivers advanced functionalities to address today’s challenges of complex SoC assembly with aggressive time-to-market constraints.
IPs packaged according to the widely supported IP-XACT standard can be instantiated, configured, and connected to build up SoC designs. Creation, editing, and review may be driven through Tcl, Python, or Java for a scripted integration, and a rich graphical user interface (GUI). RTL netlists can be generated at any time in addition to other collateral data, such as makefile scripts for an extensive range of EDA tools and connectivity reports bringing clear visibility to integration status.
Magillem Connectivity allows continuous integration with a robust, automated SoC build process that can adapt to meet changing needs within a project, ensuring error-free connectivity and drastically reducing cycle time to completion. It enables consistency and interoperability between the design flow steps with a proven correct-by-construction methodology, ensuring a high system quality.