MCMR FEC (Forward Error Correction) IP Core

OpenFive’s MCMR FEC IP core is a single solution to meet the requirements of different protocols like Interlaken, Flex Ethernet, and 802.3x to significantly improve bandwidth by enabling high speed SerDes integration. The FEC can easily achieve a BER (Bit Error Rate) of <10-15 with an input BER of >10-6, which is required by most electrical interface standards using high speed SerDes.

Built upon a flexible and robust architecture, OpenFive’s MCMR FEC IP core is compatible with various SerDes supporting different widths. The MCMR FEC IP supports bandwidth up to 400G with the ability to connect 32 SerDes lanes.

• see the entire MCMR FEC (Forward Error Correction) IP Core datasheet
• get in contact with MCMR FEC (Forward Error Correction) IP Core Supplier