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Memory controller (SDRAM or DDR SDRAM)
The logiMEM SDR/DDR SDRAM controller provides a powerful, yet simple-to-use interface between the industry standard memory devices and several processor or DMA devices which share the same physical memory devices and access them through the Processor Local Bus (PLB), On-Chip Peripheral Bus (OPB), Xilinx CacheLink and Xylon Memory Bus. Written in generic RTL VHDL, it is extremely adoptable and can fit into high-end SoRC (System on Reprogrammable Chip) systems, as well as into low-end systems featuring UMA (Unified Memory Architecture) system architecture.
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