The MIPI Camera Serial Interface 3 (CSI-3) is an interface between a Camera and a host processor baseband application engine. This interface, defined by MIPI Alliance, uses Unipro and MPHY for Link and PHY layers respectively. CSI-3 Host is the command decoding and pixel encoding logic between the Camera and UniPro.
The CSI-3 Device IP supports two C-Ports for pixel data and one C-Port for attribute transfer. In the CSI-3 Device, the pixel data from Camera is subsequently processed before being sent upstream to UniPro. The control flow, being opposite to data flow, is initiated by the application processor, to configure UniPro, and MPHYs downstream in both Host and Device sides, and also CSI-3 Device. The MIPI CSI-3 Device along with the MIPI UniPro, MPHY and the MIPI CSI-3 Host provide a complete solution for a camera application.
- Compliant with MIPI CSI-3 Spec v1.0
- 1 C-port for CPC and 2 C-ports for Pixel/Embedded Data
- CPC GET/SET/Notify/Response PDU Supported.
- Mandatory Gettable/settable properties of all attributes.
- End-to-end Support for CPC Packets.
- Round Robin arbitration for multiple VCIDs.
- TX Buffer Overflow Management
- Preemptive frame handling
- Embedded data during Vertical Blanking period supported
- 2 source pixel data interleaving
- Design Attributes
- Highly modular design
- Fully synchronous design
- Configurable IP.
- Product Package
- RTL code
- Detailed design document
- Verification environment
- Test cases
- Synthesis environment/scripts
- Design Guide
- Synthesis guide
Block Diagram of the MIPI CSI-3 Device Controller