The MIPI Camera Serial Interface 2 (CSI-2) is an interface between a Camera and a host processor baseband application engine. This interface is defined by MIPI Alliance, which defines a series of modules in a MIPI compliant product.
This MIPI CSI-2 Receiver is used in mobile and high–speed serial applications as a controller for receiving camera video and transmitting camera commands from/to MIPI CSI-2 Transmitter over MIPI lines. The camera data is encoded and then transmitted. The MIPI CSI-2 Transmitter along with our MIPI CSI-2 Receiver and MIPI DPHY provides a complete solution for decoding MIPI CSI-2 data.
- Compliant with MIPI CSI-2 Spec v1.1 and MIPI D-PHY Spec v1.1
- Max 1.5 Gbps data transfer rate per Data Lane of DPHY
- Programmable 1, 2 or 4 Data Lane Configuration.
- Operate in continuous and non-continuous clock modes.
- Command and Video Mode are supported.
- Burst and Non-Burst modes are supported.
- Video Packet Formats:YUV-422 8-bit, RGB-888, RGB-565, RAW-8, RAW-10 and RAW-12
- Camera Interface: 8, 16 and 24 bpp
- Progressive Scanning
- Silicon Proven
- Highly Modular and Scalable Design
- Active Low Asynchronous Reset
- RTL Code
- Verification Environments
- Test suites
- Synthesis Environment and Scripts
- Design Guide
- Verification Guide
- Synthesis Guide
Block Diagram of the MIPI CSI2 Rx Controller IP IP Core