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MIPI D-PHY in SMIC (40nm, 28nm)
The demand for advanced multimedia features is pushing device manufacturers to integrate more advanced peripherals such as multi-megapixel cameras and larger screens. Integrating these capabilities into next-generation devices brings new challenges to the industry in terms of power, time-to-market and overall system costs.
To address these challenges, the Mobile Industry Processor Interface (MIPI®) Alliance defines and promotes open interface specifications, such as the Camera Serial Interface (CSI-2), Display Serial Interface (DSI), which all use the MIPI D-PHY.
As a leading provider of interface IP, Synopsys’ high-quality, silicon-proven DesignWare D-PHY IP is available today in advanced process technologies.
To address these challenges, the Mobile Industry Processor Interface (MIPI®) Alliance defines and promotes open interface specifications, such as the Camera Serial Interface (CSI-2), Display Serial Interface (DSI), which all use the MIPI D-PHY.
As a leading provider of interface IP, Synopsys’ high-quality, silicon-proven DesignWare D-PHY IP is available today in advanced process technologies.
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MIPI PHY IP
- MIPI C-PHY-D-PHY Combo PHY IP on TSMC 28nm HPC+
- MIPI CPHY DPHY Combo PHY IP on TSMC 16FF/12FF
- MIPI D-PHY Tx v1.1 ONLY @1.5ghz Ultra Low Power & Low Area for IoT & Wearables
- MIPI D-PHY in TSMC (40nm, 28nm, 16nm, 12nm, 7nm)
- MIPI M-PHY in TSMC (28nm, 16nm, 12nm, 10nm)
- MIPI D-PHY v1.2/LVDS/TTL combo PHY(supporting CSI/DSI)