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MIPI D-PHY v1.1 / v1.2 IP in TSMC (12/16nm, 28nm, 40nm, and 55nm process)
M31 provides silicon-proven D-PHY in different process nodes. The D-PHY IP follows MIPI D-PHY v1.1/v1.2 spec and supports full range of high-speed (HS) and low-power (LP) data transfer. It is compliant to the PPI interface which allows seamless integration with upside controllers for Camera Serial Interface (CSI-2) and Display Serial Interface (DSI) protocols. Car manufacturers are also adopting MIPI specifications because the solutions are mature, relatively simple to use. M31 provides certified and compact PHY to support automotive applications.
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MIPI D-Phy IP
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- MIPI C-PHY-D-PHY Combo PHY IP on TSMC 28nm HPC+
- MIPI C-PHY/D-PHY Combo IP Universal, 4.5Gsps/4.5Gbps in TSMC 22ULP
- MIPI D-PHY Universal Lane 16FFC IP for Automotive
- MIPI D-PHY Universal Tx / Rx v1.1 @1.5ghz Ultra Low Power for IoT & Wearables