MIPI DSI Transmit Controller v1.3
On the application processor side, Arasan’s DSI Host Controller provides the choice of DPI or DBI Interface to a graphics controller. A DBI interface provides downstream support of Types 1 to 3 display modules, and the DPI Interface is needed for Types 2 to 4 displays.
Initial configuration of this IP can be done through programmed IO over the AHB bus, however, other bus interfaces can be provided upon request.
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Block Diagram of the MIPI DSI Transmit Controller v1.3 IP Core

DSI IP
- MIPI C-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
- MIPI D-PHY / C-PHY Combo IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
- MIPI C-PHY/D-PHY Combo IP Universal, 4.5Gsps/4.5Gbps in TSMC 22ULP
- MIPI D-PHY Universal Tx / Rx v1.1 @1.5ghz Ultra Low Power for IoT & Wearables
- MIPI C-PHY/D-PHY Combo IP DSI RX in TSMC22ULP
- MIPI D-PHY DSI/CSI Transmitter IP (Silicon proven in TSMC 22ULP)